module Registers (reset, ena, addra, dataa, enb, addrb, datab, enc, addrc, datac);

	// Entradas do módulo
	input               reset;
	input               ena;
	input       [4:0]   addra;
	input               enb;
	input       [4:0]   addrb;
	input               enc;
	input       [4:0]   addrc;
	input       [31:0]  datac;

	// Saídas do módulo
	output  reg [31:0]  dataa;
	output  reg [31:0]  datab;

	// Banco de Registerses
	reg [31:0]	Registers [31:0];


    always @(negedge(reset)) begin
        Registers[0]  <= 32'b0;
        Registers[1]  <= 32'b0;
        Registers[2]  <= 32'b0;
        Registers[3]  <= 32'b0;
        Registers[4]  <= 32'b0;
        Registers[5]  <= 32'b0;
        Registers[6]  <= 32'b0;
        Registers[7]  <= 32'b0;
        Registers[8]  <= 32'b0;
        Registers[9]  <= 32'b0;
        Registers[10] <= 32'b0;
        Registers[11] <= 32'b0;
        Registers[12] <= 32'b0;
        Registers[13] <= 32'b0;
        Registers[14] <= 32'b0;
        Registers[15] <= 32'b0;
        Registers[16] <= 32'b0;
        Registers[17] <= 32'b0;
        Registers[18] <= 32'b0;
        Registers[19] <= 32'b0;
        Registers[20] <= 32'b0;
        Registers[21] <= 32'b0;
        Registers[22] <= 32'b0;
        Registers[23] <= 32'b0;
        Registers[24] <= 32'b0;
        Registers[25] <= 32'b0;
        Registers[26] <= 32'b0;
        Registers[27] <= 32'b0;
        Registers[28] <= 32'b0;
        Registers[29] <= 32'b0;
        Registers[30] <= 32'b0;
        Registers[31] <= 32'b0;
    end
    
    always @(ena or addra or dataa or enc or addrc or datac or enb or addrb or datab) begin
        $display("LUCIANAAAAAAAAAAAAAAAAAAAAAAAAAA %d %d %d",addrc,datac,enc);
    if (ena == 1)
        	dataa = Registers[addra];
    
	if (enb == 1)
        	datab = Registers[addrb];
    
	if (enc == 1) 
		Registers[addrc] = datac;
    end
    
endmodule
